library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity division is
port (A, B: in std_logic_vector (7 downto 0);
resultado: out std_logic_vector (22 downto 0);
--c2aa,c2bb: out std_logic_vector(7 downto 0);
signo: out std_logic;
PE1: out std_logic_vector(7 downto 0);
PF1:OUT STD_LOGIC_VECTOR(13 DOWNTO 0)
);
end entity division;
architecture behavior of division is
signal temp : integer := 0;
signal auxA, auxB: std_logic_vector (7 downto 0);
signal c2A, C2B,auxa1,auxb1: std_logic_vector (7 downto 0);
constant escalar: integer :=10000;
signal res: std_logic_vector(22 downto 0);
signal auxPF: std_logic_vector( 7 downto 0 );
signal aux1: std_logic_vector(12 DOWNTO 0);
signal aux2: std_logic_vector(11 DOWNTO 0);
signal aux3: std_logic_vector(10 DOWNTO 0);
signal aux4: std_logic_vector (9 DOWNTO 0);
signal aux5: std_logic_vector (8 DOWNTO 0);
signal aux6: std_logic_vector (7 DOWNTO 0);
signal aux7: std_logic_vector (6 DOWNTO 0);
signal aux8: std_logic_vector (5 DOWNTO 0);
--signal auxPE: UNSIGNED (2 DOWNTO 0);
signal auxPE1: std_logic_vector(7 DOWNTO 0);
signal auxbits: std_logic_vector(13 DOWNTO 0);
signal auxbits1: std_logic_vector(13 DOWNTO 0);
signal auxbits2: std_logic_vector(14 DOWNTO 0);
begin
process (A, B,auxbits,auxbits1,auxbits2,res)
begin
if (A(7)='1') then
auxA <= not A;
c2A <= auxA + 1;
else
c2A<=A;
end if;
if (B(7)='1') then
auxB <= not B;
c2B <= auxB + 1;
else
c2B<=B;
end if;
Signo<= A(7) xor B(7);
-- C2aa<=C2a;
-- C2bb<=C2b;
temp <= (conv_integer (c2A)*escalar / conv_integer(c2B) );
res <= std_logic_vector(to_signed (temp, res'length));
resultado <= std_logic_vector(to_signed (temp, resultado'length));
---- *******************************************************
auxbits<="10011100010000";
auxbits1<="10011100010000";
auxbits2<="100000001110100";
if ( res < auxbits ) then
pF1<= '0' & res(12 downto 0);
PE1<= res ( 20 downto 13);
elsif ( res > auxbits1 and res < auxbits2)then
pF1<= res(13 downto 0);
PE1<= res ( 21 downto 14);
end if;
-----seccionamos el resultado
-- if (auxPF(7)='1') THEN
--.aux1<= "1001110001000";
-- else
-- aux1<="0000000000000";
-- end if;
--if (auxPF(6)='1') THEN
--aux2<= "100111000100";
-- else
-- aux2<="000000000000";
--end if;
-- if (auxPF(5)='1') THEN
-- aux3<= "10011100010";
-- else
--aux3<="00000000000";
--end if;
-- if (auxPF(4)='1') THEN
--aux4<= "1001110001";
--else
--aux4<="0000000000";
--end if;
-- if (auxPF(3)='1') THEN
-- aux5<= "100111000";
-- else
--aux5<="000000000";
--end if;
-- if (auxPF(2)='1') THEN
---aux6<= "10011100";
--else
-- aux6<="00000000";
--end if;
-- if (auxPF(1)='1') THEN
-- aux7<= "1001110";
-- else
-- aux7<="0000000";
--end if;
-- if (auxPF(0)='1') THEN
--aux8<= "100111";
-- else
-- aux8<="000000";
-- end if;
-- PF1<= res(13 downto 0);
-- auxPF<=resultado (7 downto 0);
--PF1 <=(('0'& aux1)+ ('0'& aux2)+ ('0'& aux3)+ ('0' & aux4)+('0' & aux5)+('0' & aux6)+('0' & aux7)+('0' & aux8));
--auxPE1<= res(11 downto 4 );
--PE1<=auxPE1;
end process;
end behavior;